13 Commits

Author SHA1 Message Date
931544fb87 Generate main board cam data 2020-06-22 14:58:17 +01:00
529e1c7fe7 Generate front panel cam & rename main files 2020-06-22 14:42:49 +01:00
4765f87f2a Document resistor config for 10V control voltage 2020-06-22 11:41:41 +01:00
f4f4f2ca3b Add read me file. 2020-06-22 11:35:07 +01:00
80ffa2de7e Redesign the front panel
Add a full size copper pour and use the tStop layer to add gold decals
when ENIG finish is specified.

* Add symbols for input, cv, and output jacks, and add infinity logo to
  the tStop layer.
* Add input, output arrows and signal chain markers to the tPlace layer.
* Change title to be on one line, since it fits.
2020-06-22 10:29:38 +01:00
e17d5d92fb Fix mistake in channel two output buffer 2020-06-22 10:29:13 +01:00
bb46e856f5 Add front panel board design 2019-07-05 01:03:58 +01:00
320aafe887 Fix dimensions & reroute
Originally the PCB height was 1170 mils however this would likely
interfere with the rails when in a 1u row. Reduce the size to 1130 mils
in line with the Pulp Logic specs.
2019-07-05 01:03:25 +01:00
b48d9eca29 Update file names 2019-06-29 13:09:20 +01:00
2c4588149f Add diodes to input CV conditioning
Add a shotkey diode to output of the CV conditioning stages to dump
negative voltage to ground. The maximum voltage range sent to the VC
pins of the AS3360 is 0-2.1V.

Add documentation to the schematic detailing how each chip is configured
and suggesting alternative resistor values for the first CV conditioning
stage for 0-5V and 0-8V operation.
2019-06-29 13:00:29 +01:00
326a6ef937 Add design based on AS3360 VCA chip
Design uses the [AS3360D](http://www.alfarzpp.lv/eng/sc/AS3360.pdf)
chip. CV inputs are passed through a two inverting opamp stages which
first clip then scale the CV voltage to the operating range of 0-2V.
This results in 0-8V control voltage controlling the full amplitude of
the signal from the input jacks, the outputs are then buffered using a
unity gain opamp to drive the load.
2019-06-28 21:16:25 +01:00
a68ed69965 Add jacks to schematic and add to layout
6 jacks, 3 per VCA circuit for IN, CV, OUT and positioned them on the
board layout within a 1u 6hp tile PCB dimensions.
2019-06-16 17:42:52 +01:00
883bf7c589 Add ignore file 2019-06-16 17:35:45 +01:00